With CP-RAPID3, serial high speed interconnects come true for 6U CompactPCI®!
The chassis for highest workload and data bandwidth in harsh environments. 3U card cage, EMI protected, for 19 inch mounting, provides 4 horizontal 6U CompactPCI® slots with Rear-I/O at J5. The PICMG®2.20 signal definition is used to enable 10 Gigabit Ethernet, PCI Express® 3.0, and SATA 6GB/s via backplane.
» Formidable computing power in only 3U hight
» Compatible with previous standard specifications
» Reduced power consumption due to 10GBase-KR standard
» Protecting system know-how by re-using today’s chassis and cooling concepts
» CompactPCI®: open, modular, robust, proven, long-lasting
Platform designs for enhanced workload and GPGPU computing
CP-RAPID3 is the perfect basis to gain a computing platform with extremely high performance. Up to three slots can be populated with powerful CPU blades. Alternatively, for science, video applications, or parallel computing like Fast Fourier Transform, CP-RAPID3 can be equipped with one or two market-available GPGPUs on MXM carriers (coming soon), providing high data throughput to related CPU slots. The result: a formidable computing power packed in only 3U hight.
Prepared for high performance storage applications
By special assembly options, using dual SATA 6Gb/s links, efficient platforms for storage applications can be provided.
CP-RAPID3 backplane: flexible assembly options
The PICMG®2.20 based CP-RAPID3 backplane provides a serial mesh 10GbE topology for the system slots. The 1GbE mesh for the system slots via J3, as defined in PICMG®2.16, is still available, too. Two device slots are connected with related system slots via SATA and PCIe. One of the device slots can alternatively be used for a 3rd CPU blade.
Signal definition of PICMG®2.20 suits well
The two basic features of PICMG®2.20 define everything to provide fast serial backplane interconnects: A high speed backplane connector at J4, and the right signal definition. Kontron uses the multivendor ZD plus connector for enhanced signal integrity which is compatible with PICMG®2.20 but which has better shielding than the standard ZD connector.
The way of using PICMG®2.20, in order to get high speed serial links, is perplexing close to the popular previously defined and widely used specifications:
» PICMG®2.0 (CPCI 32bit) via J1
» PICMG® (CPCI 64bit) via J2
» PCIMG®2.16 (1GbE) via J3
» Rear I/O via J3, J5
A standard PICMG®2.0/2.16 CPU blade can be used in a PCIMG®2.20 system, and vice-versa! It just needs assembly variants of the CPU blades where the J4 connector is omitted.
[ cp-rapid3_20170726_datasheet.pdf, 1.83 mb, Aug 31, 2017 ]
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